module pwm_out(
    input           clk,//clock 50MHz
    input           rst,
    input [31:0]    freq_div1,
    input [31:0]    freq_div2,


    input                   direction,
    output                  wave_a_out,
    output                  wave_b_out, 

    output                  txa_hi_frq,     //4096
    output                  txa_lw_frq      //1000

);


assign txa_hi_frq = div_clk_4;
assign txa_lw_frq = div_clk_5;


wire div_clk_4;
wire div_clk_5;

//
arbiter_divider u_div1 (
    .clk            (clk            ),
    .rst_n          (rst            ),
    .div_clk        (div_clk_4      ),
    .div_factor     (freq_div1      ),
    .direction      (direction      ),
    .wave_a_out     (wave_a_out     ),
    .wave_b_out     (wave_b_out     )
);

arbiter_divider  u_div2 (
    .clk            (clk            ),
    .rst_n          (rst            ),
    .div_clk        (div_clk_5      ),
    .div_factor     (freq_div2      ),
    .direction      (direction      ),
    .wave_a_out     (),
    .wave_b_out     ()
);

endmodule